Mr. Laksmisagar H S

BE, M. Tech, (Ph.D). , Assistant Professor

Mr. Lakshmisagar H S has obtained his graduation degree i.e B.E. (Electronics and Communication Engineering) degree from Jawaharlal Nehru National College of Engineering, Shimoga, VTU, in the year 2008 and post graduation degree i.e M.Tech ( VLSI Design) degree from RV College of Engineering, Bangalore in the year 2010. Currently, he is working as Assistant Professor in Department of Electronics and Communication Engineering, BMSIT&M since 2011. He is currently pursuing Ph.D in the area of Image Processing from VTU. He has 8 publications in the reputed International Journals and International/National Conferences. He has completed one funded Project from KSCST.

Phone: 8123008252     Email:


Teaching : 7
Research : 1



  • VLSI Design and Embedded System

Memberships in professional bodies

  • IEEE
  • VLSI Society India Pvt. Ltd


  • Modelsim
  • CADENCE-NcSim, Assura , Spectre
  • Turbo C
  • MatLab

Workshops/Conferences/Seminars conducted

  • Two-Days State level Workshop on “Low Power Embedded Systems Using MSP430” - Mar, 2017
  • Biomedical Image & Signal Processing using MATLAB”, Organized by Dept. of ECE, BMSIT&M - Feb, 2017
  • Two-Days State level Workshop on “VLSI Circuit Design Using CADENCE Tools” held at BMSIT - Jan, 2014

Workshops/FDPs/Conferences/Seminars/Internships attended

Details Date
“Biomedical Image & Signal Processing using MATLAB”, Organized by Dept. of ECE, BMSIT&M, Bangalore 06-02-2017
FDP Workshop on “High Performance Embedded System Design using Multi-core / Multi-processor SoCs” Organized by Dept. of ECE, NMIT, Bangalore 24-12-2016

Additional Responsibilities

  • Techtransform coordinator
  • SC/ST Cell incharge
  • Campus coordinator
  • Proctor Coordinator
  • Hostel anti squad committee member


Journal Name Journal Type Volume Number Issue Number ISSN ISBN Paper Title
International journal of innovative research in science and engineering international Vol-1 Issue 2 ISSN:2347-3207 FPGA implementation of reversible floating point multiplier
International journal of computing(IFRSA) international volume-2 issue-3 ISSN FPGA and ASIC implementation of vedic multiplier
International journal of engineering sciences and research Technology international Vol-1 Issue-3 ISSN:2277-9655 An Eye Tracking scheme Employing Viola-Jones and Template Matching
International Conference on Advances in Engineering Research international VOL-2 Issue ISSN FPGA implementation of 8-bit fast multiplier using Nikhilam Sutra
international journal for Research in Applied Science and Engineering Technology international journal 5 VII Design and Verification of APB Compliant Quad Channel UART