Dr. M. C. Hanumantharaju

BE MTech PhD, Professor

M. C. Hanumantharaju received his B. E (Electronics and Communication Engineering) degree from Bangalore University in the year 2001, M. Tech (Digital Communication and Network Engineering) degree from Visvesvaraya Technological University (VTU), Belgaum in the year 2004, and Ph. D (VLSI Signal and Image Processing) degree from VTU, Belgaum, in the year, 2014. He is currently working as a Professor and Head in the Department of ECE at BMS Institute of Technology and Management, Bengaluru, India. He has authored two books and 50 technical articles in refereed journals and proceedings such as IEEE, Intelligent Systems, Particle Swarm Optimization, etc. He is currently serving as reviewer for IEEE Transaction on Industrial Electronics, Computers and Electrical Engineering Journal, Journal of Microscopy and Ultrastructure, etc. His research interests include, Design of hardware architectures for signal and image processing algorithms, computer vision, Register Transfer Level (RTL) verilog coding, synthesis and optimization of Integrated Circuits (ICs), FPGA/ASIC Design.


Teaching : 15
Research : 7



  • VLSI/ASIC Design for Signal & Image Processing Algorithms

Memberships in professional bodies

  • Computer Society of India (CSI), Life Member


  • RTL Verilog/VHDL Coding
  • Synthesis & Optimization of Integrated Circuits
  • Design of Reconfigurable Architectures for Signal and Image Processing Algorithms
  • ASIC/FPGA Design
  • CMOS Analog Integrated Circuit Design
  • Microelectronic Circuits Course Video Lectures: https://www.youtube.com/user/mchanumantharaju/videos

Invite Talks Delivered: 15

Workshops/Conferences/Seminars conducted

  • Two Days Workshop on Documentation Preparation System using LaTeX -
  • One Day Workshop on Labview and its Application -
  • Two Days National Robotics Championship (NRC) Sponsored Robotics Workshop -
  • Two Day's Workshop on Matlab Fundamentals and Programming Techniques (MFTP) -

Study Materials / Notes / Courseware

Title Course Name Course Code
Module 1 and Module 2 Analog Electronics 15EC32
Unit 2: Single Stage Integrated Circuit Amplifiers Microelectronic Circuits 10EC63
Power Amplifiers Analog Electronics 15EC32
Module 3 and Module 4 Analog Electronics 15EC32
Unit 6: Operational Amplifier Microelectronic Circuits 10EC63
Unit 1: MOSFETs (Set A) Microelectronic Circuits 10EC63
Unit 1: MOSFETs (Set B) Microelectronic Circuits 10EC63
Unit 1: MOSFETs (Set C) Microelectronic Circuits 10EC63
Unit 3: Single Stage Integrated Circuit Amplifiers (Continued) Microelectronic Circuits 10EC63
Unit 5: Feedback Microelectronic Circuits 10EC63
Unit 6: Operational Amplifier (New Version) Microelectronic Circuits 10EC63
Quiz Questions and Answers with Impact Analysis Microelectronic Circuits 10EC63

Additional Responsibilities

  • Utsaha - 2016
  • SMS Coordinator - 2016
  • Project Manager - 2015


Journal Name Journal Type Volume Number Issue Number ISSN ISBN Paper Title
Journal of Multimedia Tools and Applications International 75 20 10.1007/s11042-016-3736-0 Design and Development of New Reconfigurable Architectures for LSB/Multi-bit Image Steganography System
International Journal of Swarm Intelligence International 1 2 2049-405X A New Framework for Retinex based Color Image Enhancement using Particle Swarm Optimization (PSO)
International Journal of Imaging & Robotics International 12 1 2231-525 An Improved Approach for Contrast Enhancement of Spinal Cord Images based on Multiscale Retinex Algorithm
Journal of Intelligent Systems International 22 2 978-3-319-01777-8 A Novel Full-Reference Color Image Quality Assessment Based on Energy Computation in the Wavelet Domain
International Journal of Information Processing (IJIP) International 7 4 ISSN: 0973-8215 A Novel Approach for 2D Gaussian Surround Function Implementation on FPGA with Reduced On-Chip Memory Utilization
International Journal of Computer and Electrical Engineering International 4 3 2235-656 A Novel FPGA Implementation of Adaptive Rank Order Filter (AROF) for Image Noise Removal
International Journal of Information & Electronics Engineering International 1 1 2253-556 An Efficient VLSI Architecture for Adaptive Rank Order Filter for Image Noise Removal


  • Senior Educator & Scholar Award by National Foundation for Entrepreneurship Development (NFED), India, on the occasion of 6th Teachers Day Celebration, 5th September, 2015